System-on-chip Design: Analyzing and Optimizing Source Synchronous Architecture with Electromagnetic Simulation

Source synchronous architecture is used to enable multiple chiplets to be integrated into a single system-on-chip with low latency. To ensure low error rates, the clock strobe and data channels need to be precisely matched. 2D circuit simulation is not enough for analyzing timing – 3D simulation is necessary to accurately model data propagation through structures like silicon interposers and meshed ground planes, especially at high data rates. A paper, recently presented at DesignCon 2023, demonstrates how electromagnetic simulation with SIMULIA CST Studio Suite can accurately model flight time in source synchronous architecture channels.